A physical clock only after declaring durations

Let physical availability times be $a_1\le a_2\le a_3$. Assume:

• each gate or simultaneous destructive readout round takes time $\tau >0$;

• transfers and allocation are instantaneous in this declared clock;

• classical feedback latency is included in the relevant round;

• the supplier buffers any emitted carrier not yet accepted.

The early decoder has four gate rounds and one readout round. Its completion is

The late part has at most three gate rounds.