Theorem: Exact logical realization

Every causal finite circuit has a realizing family on the substrates and schedules above such that

for every sufficiently large $n$. Its vertex-operation footprints converge to their declared supports.

The identity holds after tensoring with every untouched reference.

Proof. Use Lemma lem:timing to choose locations, firing times, and state-independent routes. Reserve one transport colour per connection and the required memory factors. Lemma lem:traffic implements the finite traffic concurrently.

At each vertex firing, all input factors and local controls are present in its junction block or hub memory. Apply the specified complete instrument on those factors and return every declared output, including records and failure flags. Unused factors receive identity channels. Every output wire follows its prescribed route. Incoming early factors remain in memory.

In a topological induction, every transport connection has logical channel equal to the identity by Theorem thm:identity. Each vertex therefore receives precisely its logical circuit inputs and applies precisely ${\Phi }_v$. After the output restrictions, the total logical channel is ${\Phi }_{\Gamma }$.

The operation is confined to a junction block whose spatial diameter and firing duration tend to zero. Its hub and firing time converge to the declared vertex point. This proves support convergence.

The induction is an equality of complete linear maps. Tensoring it with ${\mathrm{id}}_R$ proves the reference assertion.