Scheduled channels

Use finitely many sites in the convex developing patch. At each tick a partition ${\mathcal{P}}_s$ of the reserved site registers is supplied. Each block $b\in {\mathcal{P}}_s$ has a complete channel. Classical controller and record registers are included in the network.

If a block has input time $T_s$ and output time $T_{s+1}$, require

All classical dependencies must either be preinstalled data or explicit wires satisfying the same causal requirement. Finite adaptive trees can be unrolled into this reserved network, using local classical flags and identity operations on inactive branches.

For a terminal register set $Y$, define its scheduled ancestors backward by