A fixed finite event-code restriction

The complete VII-F metadata circuit is not silently inferred from these few bits. We use its following explicit fixed-instance restriction.

At the controller $A$, the exact stored incidence parameter is $j=0$; the fixed geometric packet specifies the prescribed cone and zero germ. Reserve classical mode, permission, and history bits

and one scratch bit $E=0$. A two-qubit computational-basis clock returns $a=(a_1,a_0)\in \{00,01,10,11\}$. Only $a=01$ requests the event update. Set

On the promised initial bits the update is

Thus the canonical programme $01$ performs the exact incoming-to-outgoing zero-germ mode update, spends its one permission, and retains a history bit. Other programmes request no update. No length report is used as a clock guard.

The permutation is implemented by:

1. NOT on $a_1$, Toffoli $(a_1,a_0;E)$, NOT on $a_1$;

2. CNOT from $E$ to each of $M,N,H$;

3. the inverse of step 1.

There are nine elementary NOT/CNOT/Toffoli gates. The record is restored and $E$ returns to zero. Off the promised domain this remains a reversible bit permutation, but is not assigned a geometric interpretation.