Finite code and reversible implementation

Excluding fixed table storage, a sufficient number of data bits is

The generic synthesis uses at most $2M$ bits including clean work. This is an existence bound, not an efficiency claim.

Valid location words and initially zero history are representation preconditions, not geometric guards that inspect spectator state. Additional spectators receive separately reserved location/history storage. The semantic theorem compares decoded event endpoints; it does not assert identical low-level gate lists for different interface sizes. Intermediate compiler states need not lie in the geometric decoder domain and are not exposed to the geometric controller. No claim about retiming an event through such intermediate states is made.

The reverse action of $U_{\mathrm{ex}}$ is a reversible completion, not an additional forward geometric rule. The forward rule still requires eq:guard. The circuit implements the discrete event, not continuous affine evolution or arbitrary real geometric data.