Manuscript VII-J-ST@1 · VII-J-ST.tex · lemma · f1f1d82c

Lemma: Every benchmark operation is regular and causal

Exact regular-part benchmark through the incidence parameter › Target-adapted chains and the buffer · lines 1583–1613 · proof included or linked

VII-J-ST@1#lem:benchmark-causal

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The specified execution is a finite Target B schedule. The matter is buffered across both the worldsheet incidence time and the local slice parameter . No operation meets .

The moving routes also satisfy the sufficient slicing speed (eq:vstar).

Proof. The entire axial chain is in the displayed regular tube. Every local operation is on one station worldline with strictly positive duration. The inbound exchange routes have speed , and the outbound communication portions have speed ; both are future timelike.

The incoming branch has . On the outgoing communication interval, . Thus the route speeds in are respectively and . Stationary waits and gates have zero spatial speed. Theorem thm:conegates also certifies them.

The qubits are at before , and remain there until . At , the slice has time , which lies inside that storage interval. All control copies occur before their communication departures, and every remote use waits for the record to arrive.

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