Manuscript VII-J-ST@1 · VII-J-ST.tex · section · f1f1d82c
Target-adapted chains and the buffer
Exact regular-part benchmark through the incidence parameter › Target-adapted chains and the buffer · lines 1517–1582
VII-J-ST@1#eq:D
Fix an integer . Install a chain of qubit registers at
Here is a temporary register at ; is the input register at . A separate qubit is the input at . Initialize in .
Let
During the inbound interval of length , use successive content exchanges
each of duration , realized by opposite causal carriage of the two contents along the regular axial segment. Their physical dimensionless speed is .
The unknown qubit reaches by
Both matter qubits then remain stored at . Destroy the two clock qubits in two local slots of duration , from to . The complete record is available at .
Wait until . Run the nine event-code gates, three local CNOTs implementing , and the classical-record controlled gate . The thirteen local slots each have duration , so they finish at .
Finally move 's content outward by the successive exchanges
Allow duration per outbound stage. Its first half copies the five-bit classical word
into the next site's blank record buffer by five sequential classical CNOTs. Each copy slot has positive duration . The second half carries the qubit exchange and the copied record over the segment of length . The communication speed is .
All records and payloads arrive by
Wait at the destination ports until . Records at earlier sites are retained, not reset.
Displayed formulas in this passage
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